I Made My ESP32-S3 Faster by Optimizing for SIZE — Not Speed I tuned a hot path on an ESP32-S3 and found the counter-intuitive winner: optimizing for size (-Os) beat optimizing for speed (-O2). On this chip, flash latency and instruction cache behavior dominate—tighter code stays in cache, misses less, and runs faster. Bumping the CPU to 240 MHz, switching flash to QIO, and maxing caches helped too, but -Os still edged out -O2. As always, benchmark your own workload—yours might differ. 06 March 2026