SPI vs QSPI vs RGB vs MIPI-DSI: why big cheap ESP32 screens feel slow
Two ESP32 display boards can share a chip, a price tag and a spec sheet and still feel completely different to use. The difference is almost always the display interface — the bus between the ESP32 and the panel. It decides how big a screen you can drive smoothly, how much PSRAM you need, how many GPIO you have left, and which libraries work. Here's the whole landscape in one table, then the detail.
| Interface | Smooth up to | Pins used | PSRAM | Typical boards | How it feels |
|---|---|---|---|---|---|
| SPI | ~320x240 | 4-5 | No | CYD (2432S028R), JC2432W328, M5Dial, Waveshare 1.28 | Fine for widgets; full-screen redraws visibly sweep |
| QSPI | ~480x480 | 6-7 | Helpful | JC3248W535, JC4827W543, AMOLED boards (T-Display-S3 AMOLED, Waveshare 1.8") | Smooth at 3.5-4.3"; the sweet spot for pins-vs-speed |
| 8080 parallel | ~480x320 | ~13 | Helpful | T-Display-S3, WT32-SC01 Plus | Fast for its size class; moderate pin cost |
| RGB parallel | 800x480 | ~20+ | REQUIRED | Sunton 8048S043/S050/S070, 4848S040, Waveshare 4.3-7", CrowPanel | Smooth big panels, but eats all GPIO; flicker under load without tuning |
| MIPI-DSI | 1280x800+ | dedicated | On-package | ESP32-P4 boards: Tab5, JC1060P470, CrowPanel P4, Waveshare P4 | Phone-class; software still maturing (2026) |
SPI: simple, frugal, small
The classic CYD formula. One serial lane clocked at 40-80 MHz moves roughly 4-8 MB/s of pixel data — enough to repaint a 240x320 panel at usable rates, and it only costs 4-5 pins. Push it to 480x320 and full-screen redraws become a visible wipe; LVGL partial refresh hides some of it, animation hides less. If a board is 2.8-3.2" and cheap, it's SPI.
QSPI: four lanes, the budget sweet spot
Same idea, four data lanes: ~4x the bandwidth for only a couple more pins. This is how the JC3248W535 drives 320x480 smoothly while leaving ~12 GPIO free, and how the slim AMOLED boards (T-Display-S3 AMOLED, Waveshare 1.8") hit their resolutions. The catch is library support: TFT_eSPI doesn't speak QSPI — you use Arduino_GFX, esp_lcd, or a vendor stack.
Parallel (8080 and RGB): brute force
Parallel buses move a byte or two per clock instead of bits. The moderate version is the 8080/i80 bus (~8-16 data pins) on the T-Display-S3 and WT32-SC01 Plus. The extreme version is RGB-parallel, where the panel has no controller RAM of its own and the ESP32-S3 streams every frame, continuously, from a framebuffer in PSRAM. That's what every 4.3-7" budget panel does, and it explains their three shared quirks: 8 MB PSRAM is mandatory (800x480x16-bit = 768 KB per frame), nearly every GPIO is consumed by the bus, and anything that steals memory bandwidth (Wi-Fi bursts, flash writes) can flicker the panel. The board pages list the mitigations — bounce buffers, XIP-from-PSRAM, octal PSRAM at 120 MHz.
MIPI-DSI: the P4 era
The ESP32-P4 brings the interface phones use: dedicated high-speed differential lanes with the display pipeline in silicon. 1024x600 and 1280x800 panels run smoothly without the GPIO tax or the tearing folklore, which is why boards like the Guition JC1060P470 (7" 1024x600, ~$35) and M5Stack Tab5 (5" 720p) suddenly make the S3 boards look last-gen on picture quality. The trade, in mid-2026: software. ESPHome's P4 + DSI support is new with open bugs, and Arduino support is beta — ESP-IDF + LVGL is the dependable path.
So which do I buy?
Match the interface to the size you actually need: SPI under 3" · QSPI at 3-4.5" (best pins-per-dollar) · RGB at 4.3-7" if you want cheap-and-big today and don't need spare GPIO · MIPI-DSI/P4 if you want the best picture and enjoy the frontier. Then pick the specific board in the comparison table — it has an interface column and filters.